Datasheet

MC68HC812A4 Data Sheet, Rev. 7
Freescale Semiconductor 43
Chapter 3
Central Processor Unit (CPU12)
3.1 Overview
The CPU12 is a high-speed, 16-bit processor unit. It has full 16-bit data paths and wider internal registers
(up to 20 bits) for high-speed extended math instructions. The instruction set is a proper superset of the
M68HC11instruction set. The CPU12 allows instructions with odd byte counts, including many single-byte
instructions. This provides efficient use of ROM space. An instruction queue buffers program information
so the CPU always has immediate access to at least three bytes of machine code at the start of every
instruction. The CPU12 also offers an extensive set of indexed addressing capabilities.
3.2 Programming Model
CPU12 registers are an integral part of the CPU and are not addressed as if they were memory locations.
See Figure 3-1.
Figure 3-1. Programming Model
7
15
15
15
15
15
D
X
Y
SP
PC
AB
NSXH I ZVC
0
0
0
0
0
0
70
CONDITION CODE REGISTER
8-BIT ACCUMULATORS A AND B
16-BIT DOUBLE ACCUMULATOR D (A : B)
INDEX REGISTER X
INDEX REGISTER Y
STACK POINTER
PROGRAM COUNTER
STOP DISABLE (IGNORE STOP OPCODES)
CARRY
OVERFLOW
ZERO
NEGATIVE
IRQ INTERRUPT MASK (DISABLE)
HALF-CARRY FOR BCD ARITHMETIC
XIRQ INTERRUPT MASK (DISABLE)