Datasheet

EEPROM
MC68HC812A4 Data Sheet, Rev. 7
74 Freescale Semiconductor
Figure 7-1. EEPROM Block Protect Mapping
7.3 EEPROM Control Registers
This section describes the EEPROM control registers.
7.3.1 EEPROM Module Configuration Register
Read: Anytime
Write: Varies from bit to bit
EESWAI — EEPROM Stops in Wait Mode Bit
0 = Module is not affected during wait mode.
1 = Module ceases to be clocked during wait mode.
This bit should be cleared if the wait mode vectors are mapped in the EEPROM array.
PROTLCK — Block Protect Write Lock Bit
0 = Block protect bits and bulk erase protection bit can be written.
1 = Block protect bits are locked.
Write once in normal modes (SMODN = 1). Set and clear anytime in special modes (SMODN = 0).
EERC — EEPROM Charge Pump Clock Bit
0 = System clock is used as clock source for the internal charge pump; internal RC oscillator is
stopped.
1 = Internal RC oscillator drives the charge pump; RC oscillator is required when the system bus
clock is lower than f
PROG
.
Write: Anytime
Address: $00F0
Bit 7654321Bit 0
Read:
11111EESWAI PROTLCK EERC
Write:
Reset:11111100
Figure 7-2. EEPROM Module Configuration Register (EEMCR)
BPROT0
64 BYTES
BPROT6
BPROT5
BPROT4
BPROT3
BPROT2
BPROT1
$_000
$_800
$_C00
$_E00
$_F00
$_F80
$_FC0
$_FFF
2 KBYTES
1 KBYTE
512 BYTES
256 BYTES
128 BYTES
64 BYTES
RESERVED
64 BYTES
VECTORS
64 BYTES
SINGLE-CHIP
VECTORS
$FF80
$FFBF
$FFC0
$FFFF