Datasheet

EEPROM
MC68HC812A4 Data Sheet, Rev. 7
76 Freescale Semiconductor
EEVEN — Even Row Programming Bit
1 = Bulk program/erase all even rows
0 = Even row bulk programming/erasing disabled
MARG — Program and Erase Voltage Margin Test Enable Bit
1 = Program and erase margin test
0 = Normal operation
This bit is used to evaluate the program/erase voltage margin.
EECPD — Charge Pump Disable Bit
1 = Disable charge pump
0 = Charge pump is turned on during program/erase
EECPRD — Charge Pump Ramp Disable Bit
1 = Disable charge pump controlled ramp up
0 = Charge pump is turned on progressively during program/erase
This bit is known to enhance write/erase endurance of EEPROM cells.
ECPM — Charge Pump Monitor Enable Bit
1 = Output the charge pump voltage on the IRQ
/V
PP
pin
0 = Normal operation
7.3.4 EEPROM Programming Register
Read: Anytime
Write: Varies from bit to bit
BULKP — Bulk Erase Protection Bit
1 = EEPROM protected from bulk or row erase
0 = EEPROM can be bulk erased.
Write anytime, if EEPGM = 0 and PROTLCK = 0
BYTE — Byte and Aligned Word Erase Bit
1 = One byte or one aligned word erase only
0 = Bulk or row erase enabled
Write anytime, if EEPGM = 0
ROW — Row or Bulk Erase Bit (when BYTE = 0)
1 = Erase only one 32-byte row
0 = Erase entire EEPROM array
Write anytime, if EEPGM = 0
BYTE and ROW have no effect when ERASE = 0.
If BYTE = 1 and test mode is not enabled, only the location specified by the address written to the
programming latches is erased. The operation is a byte or an aligned word erase depending on the size
of written data.
Address: $00F3
Bit 7654321Bit 0
Read:
BULKP 0 0 BYTE ROW ERASE EELAT EEPGM
Write:
Reset:10000000
Figure 7-5. EEPROM Programming Register (EEPROG)