Datasheet

Clock Generator Module (CGM)
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
132 Freescale Semiconductor
10.3.2.4 Programming the PLL
Use this 9-step procedure to program the PLL. Table 10-2 lists the variables used and their meaning
(Please also reference Figure 10-1).
1. Choose the desired bus frequency, f
BUSDES
.
Example: f
BUSDES
= 8 MHz
2. Calculate the desired VCO frequency, f
VCLKDES
.
Example: f
VCLKDES
= 4 × f
BUSDES
f
VCLKDES
= 4 × 8 MHz = 32 MHz
3. Using a reference frequency, f
RCLK
, equal to the crystal frequency, calculate the VCO frequency
multiplier, N. Round the result to the nearest integer.
Example:
4. Calculate the VCO frequency, f
CGMVCLK
.
Example: f
CGMVCLK
= 8 × 4 MHz = 32 MHz
5. Calculate the bus frequency, f
BUS
, and compare f
BUS
with f
BUSDES
.
Example:
6. If the calculated f
bus
is not within the tolerance limits of your application, select another f
BUSDES
or
another f
RCLK
.
Table 10-2. Variable Definitions
Variable Definition
f
BUSDES
Desired Bus Clock Frequency
f
VCLKDES
Desired VCO Clock Frequency
f
CGMRCLK
Chosen Reference Crystal Frequency
f
CGMVCLK
Calculated VCO Clock Frequency
f
BUS
Calculated Bus Clock Frequency
f
NOM
Nominal VCO Center Frequency
f
CGMVRS
Shifted VCO Center Frequency
N
f
VCLKDES
f
CGMRCLK
-------------------------=
N
32 MHz
4 MHz
--------------------=8=
f
CGMVCLK
Nf
CGMRCLK
×=
f
BUS
f
CGMVCLK
4
------------------------=
f
BUS
32 MHz
4
--------------------=8 MHz=