Datasheet

Break Module (BRK)
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
152 Freescale Semiconductor
13.5.1 Break Status and Control Register
The break status and control register contains break module enable and status bits.
BRKE — Break Enable Bit
This read/write bit enables breaks on break address register matches. Clear BRKE by writing a 0 to bit
7. Reset clears the BRKE bit.
1 = Breaks enabled on 16-bit address match
0 = Breaks disabled on 16-bit address match
BRKA — Break Active Bit
This read/write status and control bit is set when a break address match occurs. Writing a 1 to BRKA
generates a break interrupt. Clear BRKA by writing a 0 to it before exiting the break routine. Reset
clears the BRKA bit.
1 = (When read) Break address match
0 = (When read) No break address match
13.5.2 Break Address Registers
The break address registers contain the high and low bytes of the desired breakpoint address. Reset
clears the break address registers.
Address: $FE0E
Bit 7654321Bit 0
Read:
BRKE BRKA
000000
Write:
Reset:00000000
= Unimplemented
Figure 13-3. Break Status and Control Register (BSCR)
Register: BRKH BRKL
Address: $FE0C $FE0D
Bit 7654321Bit 0
Read:
Bit 15 14 13 12 11 10 9 Bit 8
Write:
Reset:00000000
Read:
Bit 7654321Bit 0
Write:
Reset:00000000
Figure 13-4. Break Address Registers (BRKH and BRKL)