Datasheet

Functional Description
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
Freescale Semiconductor 161
Figure 14-6. Monitor Mode Entry Timing
If the received bytes match those at locations $FFF6–$FFFD, the host bypasses the security feature and
can read all FLASH locations and execute code from FLASH. Security remains bypassed until a power-on
reset occurs. After the host bypasses security, any reset other than a power-on reset requires the host to
send another eight bytes. If the reset was not a power-on reset, the security remains bypassed regardless
of the data that the host sends.
If the received bytes do not match the data at locations $FFF6–$FFFD, the host fails to bypass the
security feature. The MCU remains in monitor mode, but reading FLASH locations returns undefined data,
and trying to execute code from FLASH causes an illegal address reset. After the host fails to bypass
security, any reset other than a power-on reset causes an endless loop of illegal address resets.
After receiving the eight security bytes from the host, the MCU transmits a break character signalling that
it is ready to receive a command.
NOTE
The MCU does not transmit a break character until after the host sends the
eight security bytes.
Byte 1
Byte 1 Echo
Byte 2
Byte 2 Echo
Byte 8
Byte 8 Echo
Command
Command Echo
PA0
RST
V
DD
4096 + 32 CGMXCLK CYCLES
24 BUS CYCLES (MINIMUM)
1
4
1
1
2
1
Break
NOTE: 1 = Echo delay (2 bit times)
2 = Data return delay (2 bit times)
4 = Wait 1 bit time before sending next byte.
4
FROM HOST
FROM MCU