Datasheet

Low-Voltage Inhibit (LVI)
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
170 Freescale Semiconductor
16.6.2 Stop Mode
With the LVISTOP and LVIPWR bits in the configuration register programmed to a logic 1, the LVI module
will be active after a STOP instruction. Because CPU clocks are disabled during stop mode, the LVI trip
must bypass the digital filter to generate a reset and bring the MCU out of stop.
With the LVIPWR bit in the configuration register programmed to logic 1 and the LVISTOP bit at a logic 0,
the LVI module will be inactive after a STOP instruction.
NOTE
The LVI feature is intended to provide the safe shutdown of the
microcontroller and thus protection of related circuitry prior to any
application V
DD
voltage collapsing completely to an unsafe level. It is not
intended that users operate the microcontroller at lower than specified
operating voltage V
DD
.