Datasheet

Serial Communications Interface (SCI)

MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6

182 Freescale Semiconductor

18.4.2.3 Break Characters

Writing a logic 1 to the send break bit, SBK, in SCC2 loads the transmit shift register with a break

character. A break character contains all logic 0s and has no start, stop, or parity bit. Break character

length depends on the M bit in SCC1. As long as SBK is at logic 1, transmitter logic continuously loads

break characters into the transmit shift register. After software clears the SBK bit, the shift register finishes

transmitting the last break character and then transmits at least one 1. The automatic 1 at the end of a

break character guarantees the recognition of the start bit of the next character.

The SCI recognizes a break character when a start bit is followed by eight or nine logic 0 data bits and a

logic 0 where the stop bit should be. Receiving a break character has the following effects on SCI

registers:

• Sets the framing error bit (FE) in SCS1

• Sets the SCI receiver full bit (SCRF) in SCS1

• Clears the SCI data register (SCDR)

• Clears the R8 bit in SCC3

• Sets the break flag bit (BKF) in SCS2

• May set the overrun (OR), noise flag (NF), parity error (PE), or reception in progress flag (RPF) bits

SCI Status Register 1 (SCS1)

Read: SCTE TC SCRF IDLE OR NF FE PE

Write:

Reset:11000000

SCI Data Register (SCDR)

Read: R7 R6 R5 R4 R3 R2 R1 R0

Write: T7 T6 T5 T4 T3 T2 T1 T0

Reset: Unaffected by Reset

SCI Baud Rate Register (SCBR)

SCP1 SCP0 R SCR2 SCR1 SCR0

Write:

Reset:00000000

Table 18-3. SCI Transmitter I/O Address Summary

Address $0013 $0014 $0015 $0016 $0018 $0019

= Unimplemented U = Unaffected R = Reserved

Figure 18-5. SCI Transmitter I/O Register Summary (Continued)