Datasheet

Programmable Interrupt Timer (PIT)
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
248 Freescale Semiconductor
21.7.3 PIT Counter Modulo Registers
The read/write PIT modulo registers contain the modulo value for the PIT counter. When the PIT counter
reaches the modulo value the overflow flag (POF) becomes set and the PIT counter resumes counting
from $0000 at the next timer clock. Writing to the high byte (PMODH) inhibits the POF bit and overflow
interrupts until the low byte (PMODL) is written. Reset sets the PIT counter modulo registers.
NOTE
Reset the PIT counter before writing to the PIT counter modulo registers.
Address: $004E:$004F
Bit 7654321Bit 0
Read:
Bit 15 14 13 12 11 10 9 Bit 8
Write:
Reset:11111111
Address: $004E:$004F
Bit 7654321Bit 0
Read:
Bit 7654321Bit 0
Write:
Reset:11111111
Figure 21-5. PIT Counter Modulo Registers (PMODH–PMODL)