Datasheet

Input/Output Ports
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
254 Freescale Semiconductor
22.4 Port C
Port C is an 6-bit general-purpose bidirectional I/O port. Note that PTC5 is only available on 64-pin
package options.
22.4.1 Port C Data Register
The port C data register contains a data latch for each of the six port C pins.
PTC[5:0] — Port C Data Bits
These read/write bits are software-programmable. Data direction of each port C pin is under the control
of the corresponding bit in data direction register C. Reset has no effect on port C data (5:0).
MCLK — System Clock Bit
The system clock is driven out of PTC2 when enabled by MCLKEN bit in PTCDDR7.
22.4.2 Data Direction Register C
Data direction register C determines whether each port C pin is an input or an output. Writing a logic 1 to
a DDRC bit enables the output buffer for the corresponding port C pin; a logic 0 disables the output buffer.
MCLKEN — MCLK Enable Bit
This read/write bit enables MCLK to be an output signal on PTC2. If MCLK is enabled, DDRC2 has no
effect. Reset clears this bit.
1 = MCLK output enabled
0 = MCLK output disabled
Address: $0002
Bit 7654321Bit 0
Read: 0 0
PTC5 PTC4 PTC3 PTC2 PTC1 PTC0
Write: R R
Reset: Unaffected by Reset
R= Reserved
Alternative
Functions:
MCLK
Figure 22-8. Port C Data Register (PTC)
Address: $0006
Bit 7654321Bit 0
Read:
MCLKEN
0
DDRC5 DDRC4 DDRC3 DDRC2 DDRC1 DDRC0
Write: R
Reset:00000000
R= Reserved
Figure 22-9. Data Direction Register C (DDRC)