Datasheet

Input/Output Ports
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
266 Freescale Semiconductor
Figure 22-25 shows the port H I/O logic.
Figure 22-25. Port H I/O Circuit
When bit DDRHx is a logic 1, reading address $000B reads the PTHx data latch. When bit DDRHx is a
logic 0, reading address $000B reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit. Table 22-8 summarizes the operation of the port H pins.
Table 22-8. Port H Pin Functions
DDRH
Bit
PTH
Bit
I/O Pin
Mode
Accesses to DDRH Accesses to PTH
Read/Write Read Write
0 X Input, Hi-Z DDRH[1:0] Pin
PTH[1:0]
(1)
1 X Output DDRH[1:0] PTH[1:0] PTH[1:0]
X = don’t care
Hi-Z = high impedance
1. Writing affects data register, but does not affect input.
READ DDRH ($000F)
WRITE DDRH ($000F)
RESET
WRITE PTH ($000B)
READ PTH ($000B)
PTHx
DDRHx
PTHx
INTERNAL DATA BUS