Datasheet

Programmer’s Model of Control Registers
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
Freescale Semiconductor 295
23.13.8 MSCAN08 Transmitter Control Register
ABTRQ2–ABTRQ0 — Abort Request
The CPU sets an ABTRQx bit to request that an already scheduled message buffer (TXE = 0) be
aborted. The MSCAN08 will grant the request if the message has not already started transmission, or
if the transmission is not successful (lost arbitration or error). When a message is aborted the
associated TXE and the abort acknowledge flag (ABTAK) (see 23.13.7 MSCAN08 Transmitter Flag
Register) will be set and an TXE interrupt is generated if enabled. The CPU cannot reset ABTRQx.
ABTRQx is cleared implicitly whenever the associated TXE flag is set.
1 = Abort request pending
0 = No abort request
NOTE
The software must not clear one or more of the TXE flags in CTFLG and
simultaneously set the respective ABTRQ bit(s).
TXEIE2–TXEIE0 — Transmitter Empty Interrupt Enable
1 = A transmitter empty (transmit buffer available for transmission) event results in a transmitter
empty interrupt.
0 = No interrupt is generated from this event.
NOTE
The CTCR register is held in the reset state when the SFTRES bit in
CMCR0 is set.
Address: $0507
Bit 7654321Bit 0
Read: 0
ABTRQ2 ABTRQ1 ABTRQ0
0
TXEIE2 TXEIE1 TXEIE0
Write:
Reset:00000000
= Unimplemented
Figure 23-22. Transmitter Control Register (CTCR)