Datasheet

Pin Assignments
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
Freescale Semiconductor 33
Table 1-2. Clock Signal Naming Conventions
Clock Signal Name Description
CGMXCLK
Buffered version of OSC1 from
Clock Generation Module (CGM)
CGMOUT
PLL-based or OSC1-based clock output from
Clock Generator Module (CGM)
Bus Clock CGMOUT divided by two
SPSCK SPI serial clock
TACLK External clock input for TIMA
TBCLK External clock input for TIMB
Table 1-3. Clock Source Summary
Module Clock Source
ADC CGMXCLK or Bus Clock
CAN CGMXCLK or CGMOUT
COP CGMXCLK
CPU Bus Clock
FLASH Bus Clock
EEPROM CGMXCLK or Bus Clock
RAM Bus Clock
SPI Bus Clock/SPSCK
SCI CGMXCLK
TIMA Bus Clock or PTD6/ATD14/TACLK
TIMB Bus Clock or PTD4/TBCLK
PIT Bus Clock
SIM CGMOUT and CGMXCLK
IRQ Bus Clock
BRK Bus Clock
LVI Bus Clock and CGMXCLK
CGM OSC1 and OSC2