Datasheet

Analog-to-Digital Converter (ADC)
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
330 Freescale Semiconductor
26.5 Low-Power Modes
The following subsections describe the low-power modes.
26.5.1 Wait Mode
The ADC continues normal operation during wait mode. Any enabled CPU interrupt request from the ADC
can bring the MCU out of wait mode. If the ADC is not required to bring the MCU out of wait mode, power
down the ADC by setting the ADCH[4:0] bits in the ADC status and control register before executing the
WAIT instruction.
26.5.2 Stop Mode
The ADC module is inactive after the execution of a STOP instruction. Any pending conversion is aborted.
ADC conversions resume when the MCU exits stop mode. Allow one conversion cycle to stabilize the
analog circuitry before attempting a new ADC conversion after exiting stop mode.
26.6 I/O Signals
The ADC module has 15 channels that are shared with I/O ports B and D. Refer to 28.1.6 ADC
Characteristics for voltages referenced below.
26.6.1 ADC Analog Power Pin (V
DDAREF
)/ADC Voltage Reference Pin (V
REFH
)
The ADC analog portion uses V
DDAREF
as its power pin. Connect the V
DDA
/V
DDAREF
pin to the same
voltage potential as V
DD
. External filtering may be necessary to ensure clean V
DDAREF
for good results.
V
REFH
is the high reference voltage for all analog-to-digital conversions.
NOTE
Route V
DDAREF
carefully for maximum noise immunity and place bypass
capacitors as close as possible to the package. V
DDAREF
must be present
for operation of the ADC.
26.6.2 ADC Analog Ground Pin (V
SSA
)/ADC Voltage Reference Low Pin (V
REFL
)
The ADC analog portion uses V
SSA
as its ground pin. Connect the V
SSA
pin to the same voltage potential
as V
SS
.
V
REFL
is the lower reference supply for the ADC.
26.6.3 ADC Voltage In (ADCVIN)
ADCVIN is the input voltage signal from one of the 15 ADC channels to the ADC module.
26.7 I/O Registers
These I/O registers control and monitor ADC operation:
ADC status and control register (ADSCR)
ADC data register (ADR)
ADC clock register (ADICLK)