Datasheet

Memory Map
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
44 Freescale Semiconductor
2.3 Additional Status and Control Registers
Selected addresses in the range $FE00 to $FFCB contain additional Status and Control registers as
shown in Figure 2-3. A noted exception is the COP Control Register (COPCTL) at address $FFFF.
Addr.Register Name Bit 7654321Bit 0
$FE00
SIM Break Status Register
(SBSR)
Read:
RRRRRR
BW
R
Write: 0
$FE01
SIM Reset Status Register
(SRSR)
Read: POR PIN COP ILOP ILAD 0 LVI 0
Write:
$FE03
SIM Break Flag Control
Register (SBFCR)
Read:
BCFERRRRRRR
Write:
$FE08
FLASH-2 Control Register
(FL2CR)
Read:0000
HVEN VERF ERASE PGM
Write:
$FE09
Configuration Write-Once
Register (CONFIG-2)
Read:
EEDIVCLK R R MSCAND
AT6 0A
RRAZxx
Write: R
$FE0C
Break Address Register High
(BRKH)
Read:
Bit 15 14 13 12 11 10 9 Bit 8
Write:
$FE0D
Break Address Register Low
(BRKL)
Read:
Bit 7654321Bit 0
Write:
$FE0E
Break Status and Control
Register (BRKSCR)
Read:
BRKE BRKA
000000
Write:
$FE0F
LVI Status Register
(LVISR)
Read:LVIOUT0000000
Write:
$FE10
EE1DIV Hi Nonvolatile
Register (EE1DIVHNVR)
Read:
Write:
EEDIVS-
ECD
RRRREEDIV10EEDIV9EEDIV8
$FE11
EE1DIV Lo Nonvolatile
Register (EE1DIVLNVR)
Read:
EEDIV7 EEDIV6 EEDIV5 EEDIV4 EEDIV3 EEDIV2 EEDIV1 EEDIV0
Write:
$FE1A
EE1DIV Divider High Register
(EE1DIVH)
Read:
EEDIVS-
ECD
0000
EEDIV10 EEDIV9 EEDIV8
Write:
$FE1B
EE1DIV Divider Low Register
(EE1DIVL)
Read:
EEDIV7 EEDIV6 EEDIV5 EEDIV4 EEDIV3 EEDIV2 EEDIV1 EEDIV0
Write:
$FE1C
EEPROM-1 Nonvolatile
Register (EE1NVR)
Read:
UNUSED UNUSED UNUSED EEPRTCT EEBP3 EEBP2 EEBP1 EEBP0
Write:
$FE1D
EEPROM-1 Control Register
(EE1CR)
Read:
UNUSED
0
EEOFF EERAS1 EERAS0 EELAT AUTO EEPGM
Write:
= Unimplemented R = Reserved
Figure 2-3. Additional Status and Control Registers (Sheet 1 of 2)