Datasheet

FLASH-1 Control and Block Protect Registers
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
Freescale Semiconductor 53
4.3.2 FLASH-1 Block Protect Register
The FLASH-1 Block Protect Register (FL1BPR) is implemented as a byte within the FLASH-1 memory
and therefore can only be written during a FLASH programming sequence. The value in this register
determines the starting location of the protected range within the FLASH-1 memory.
FL1BPR[7:0] — Block Protect Register Bit 7 to Bit 0
These eight bits represent bits [14:7] of a 16-bit memory address. Bit 15 is logic 1 and bits [6:0] are
logic 0s.
The resultant 16-bit address is used for specifying the start address of the FLASH-1 memory for block
protection. FLASH-1 is protected from this start address to the end of FLASH-1 memory at $FFFF.
With this mechanism, the protect start address can be $XX00 and $XX80 (128 byte page boundaries)
within the FLASH-1 array.
Figure 4-3. FLASH-1 Block Protect Start Address
FLASH-1 Protected Ranges
Address: $FF80
Bit 7654321Bit 0
Read:
BPR7 BPR6 BPR5 BPR4 BPR3 BPR2 BPR1 BPR0
Write:
Figure 4-2. FLASH-1 Block Protect Register (FL1BPR)
FL1BPR[7:0] Protected Range
$FF No Protection
$FE $FF00 – $FFFF
$FD $FE80 – $FFFF
$0B $8580 – $FFFF
$0A $8500 – $FFFF
$09 $8480 – $FFFF
$08 $8400 – $FFFF
$04 $8200 – $FFFF
$03 $8180 – $FFFF
$02 $8100 – $FFFF
$01 $8080 – $FFFF
$00 $8000 – $FFFF
1
FLBPR value
16-bit memory address
0000000
Start address of FLASH block protect