Datasheet

Functional Description
MC68HC908GP32 Data Sheet, Rev. 10
Freescale Semiconductor 177
Figure 15-2. SPI Module Block Diagram
Figure 15-3. Full-Duplex Master-Slave Connections
TRANSMITTER CPU INTERRUPT REQUEST
RECEIVER/ERROR CPU INTERRUPT REQUEST
76543210
SPR1
SPMSTR
TRANSMIT DATA REGISTER
SHIFT REGISTER
SPR0
CLOCK
SELECT
÷ 2
CLOCK
DIVIDER
÷ 8
÷ 32
÷ 128
CLOCK
LOGIC
CPHA CPOL
SPI
SPRIE
SPE
SPWOM
SPRF
SPTE
OVRF
M
S
PIN
CONTROL
LOGIC
RECEIVE DATA REGISTER
SPTIE
SPE
INTERNAL BUS
BUSCLK
MODFEN
ERRIE
CONTROL
MODF
SPMSTR
MOSI
MISO
SPSCK
SS
SHIFT REGISTER
SHIFT REGISTER
BAUD RATE
GENERATOR
MASTER MCU SLAVE MCU
V
DD
MOSI MOSI
MISO MISO
SPSCK SPSCK
SS SS