Datasheet

Development Support
MC68HC908GP32 Data Sheet, Rev. 10
216 Freescale Semiconductor
Figure 18-1. Break Module Block Diagram
Addr. Register Name Bit 7 654321Bit 0
$FE00
SIM Break Status Register
(SBSR)
See page 218.
Read:
RRRRRR
SBSW
R
Write: Note
(1)
Reset: 0
$FE02 Reserved
Read:
RRRRRRRR
Write:
Reset:00000000
$FE03
SIM Break Flag Control
Register (SBFCR)
See page 219.
Read:
BCFE RRRRRRR
Write:
Reset: 0
$FE09
Break Address High
Register (BRKH)
See page 218.
Read:
Bit15 Bit14 Bit13 Bit12 Bit11 Bit10 Bit9 Bit8
Write:
Reset:00000000
$FE0A
Break Address Low
Register (BRKL)
See page 218.
Read:
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Write:
Reset:00000000
$FE0B
Break Status and Control
Register (BRKSCR)
See page 218.
Read:
BRKE BRKA
000000
Write:
Reset:00000000
1. Writing a 0 clears SBSW.
= Unimplemented R = Reserved
Figure 18-2. Break I/O Register Summary
ADDRESS BUS[15:8]
ADDRESS BUS[7:0]
8-BIT COMPARATOR
8-BIT COMPARATOR
CONTROL
BREAK ADDRESS REGISTER LOW
BREAK ADDRESS REGISTER HIGH
ADDRESS BUS[15:0]
BKPT
(TO SIM)