Datasheet

Monitor Module (MON)
MC68HC908GP32 Data Sheet, Rev. 10
Freescale Semiconductor 227
18.3.1.4 Data Format
Communication with the monitor ROM is in standard non-return-to-zero (NRZ) mark/space data format.
Transmit and receive baud rates must be identical.
Figure 18-12. Monitor Data Format
18.3.1.5 Break Signal
A start bit (0) followed by nine 0 bits is a break signal. When the monitor receives a break signal, it drives
the PTA0 pin high for the duration of two bits and then echoes back the break signal.
Figure 18-13. Break Transaction
18.3.1.6 Baud Rate
The communication baud rate is controlled by the external clock and the state of the PTC3 pin (when
IRQ
is set to V
TST
) upon entry into monitor mode. If monitor mode was entered with a blank reset vector and
V
DD
or V
SS
on IRQ, then the baud rate is independent of PTC3.
Table 18-1 lists external frequencies required to achieve a standard baud rate of 9600 bps. The effective
baud rate is the bus frequency divided by 256.
18.3.1.7 Commands
The monitor ROM firmware uses these commands:
• READ (read memory)
• WRITE (write memory)
• IREAD (indexed read)
• IWRITE (indexed write)
• READSP (read stack pointer)
• RUN (run user program)
The monitor ROM firmware echoes each received byte back to the PTA0 pin for error checking. An 11-bit
delay at the end of each command allows the host to send a break character to cancel the command. A
delay of two bit times occurs before each echo and before READ, IREAD, or READSP data is returned.
The data returned by a read command appears after the echo of the last byte of the command.
NOTE
Wait one bit time after each echo before sending the next byte.
BIT 5
START
BIT
BIT 1
NEXT
STOP
BIT
START
BIT
BIT 2 BIT 3 BIT 4 BIT 7BIT 0
BIT 6
0 1 2 3 4 5 6 7
0 1 2 3 4 5 6 7
MISSING STOP BIT
2-STOP BIT DELAY BEFORE ZERO ECHO