Datasheet

Memory
MC68HC908GP32 Data Sheet, Rev. 10
30 Freescale Semiconductor
$0000
I/O Registers
64 Bytes
↓
$003F
$0040
RAM
512 Bytes
↓
$023F
$0240
Unimplemented
32,192 Bytes
↓
$7FFF
$8000
FLASH Memory
32,256 Bytes
↓
$FDFF
$FE00 SIM Break Status Register (SBSR)
$FE01 SIM Reset Status Register (SRSR)
$FE02 Reserved (SUBAR)
$FE03 SIM Break Flag Control Register (SBFCR)
$FE04 Interrupt Status Register 1 (INT1)
$FE05 Interrupt Status Register 2 (INT2)
$FE06 Interrupt Status Register 3 (INT3)
$FE07 Reserved
$FE08 FLASH Control Register (FLCR)
$FE09 Break Address Register High (BRKH)
$FE0A Break Address Register Low (BRKL)
$FE0B Break Status and Control Register (BRKSCR)
$FE0C LVI Status Register (LVISR)
$FE0D
Unimplemented
3 Bytes
↓
$FE0F
$FE10
Unimplemented
16 Bytes
Reserved for Compatibility with Monitor Code
for A-Family Parts
↓
$FE1F
$FE20
Monitor ROM
307 Bytes
↓
$FF52
$FF53
Unimplemented
43 Bytes
↓
$FF7D
$FF7E FLASH Block Protect Register (FLBPR)
$FF7F
Unimplemented
93 Bytes
↓
$FFDB
Note: $FFF6–$FFFD
reserved for
8 security bytes
$FFDC
FLASH Vectors
36 Bytes
↓
$FFFF
Figure 2-1. Memory Map