Datasheet

Resets and Interrupts
MC68HC908GR16A Data Sheet, Rev. 1.0
140 Freescale Semiconductor
Interrupts must be acknowledged by writing a 1 to the TACK bit.
13.3.3 Interrupt Status Registers
The flags in the interrupt status registers identify maskable interrupt sources.
Table 13-2 summarizes the interrupt sources and the interrupt status register flags that they set. The
interrupt status registers can be useful for debugging.
13.3.3.1 Interrupt Status Register 1
IF6–IF1 — Interrupt Flags 6–1
These flags indicate the presence of interrupt requests from the sources shown in Table 13-2.
1 = Interrupt request present
0 = No interrupt request present
Bit 1 and Bit 0 — Always read 0
Table 13-2. Interrupt Source Flags
Interrupt Source Interrupt Status Register Flag
Reset —
SWI instruction —
IRQ
pin IF1
CGM change of lock IF2
TIM1 channel 0 IF3
TIM1 channel 1 IF4
TIM1 overflow IF5
TIM2 channel 0 IF6
TIM2 channel 1 IF7
TIM2 overflow IF8
SPI receive IF9
SPI transmit IF10
SCI error IF11
SCI receive IF12
SCI transmit IF13
Keyboard IF14
ADC conversion complete IF15
Timebase IF16
Address: $FE04
Bit 7654321Bit 0
Read: IF6 IF5 IF4 IF3 IF2 IF1 0 0
Write:RRRRRRRR
Reset:00000000
R = Reserved
Figure 13-6. Interrupt Status Register 1 (INT1)