Datasheet

Enhanced Serial Communications Interface (ESCI) Module
MC68HC908GR16A Data Sheet, Rev. 1.0
166 Freescale Semiconductor
node to differentiate between a 0x00 character of 10.35 bits and a break character of 11.05 bits. The
break symbol length must be verified in software in any case, but the LINR bit serves as a filter,
preventing false detections of break characters that are really 0x00 data characters.
SCP1 and SCP0 — ESCI Baud Rate Register Prescaler Bits
These read/write bits select the baud rate register prescaler divisor as shown in Table 14-8. Reset
clears SCP1 and SCP0.
SCR2–SCR0 — ESCI Baud Rate Select Bits
These read/write bits select the ESCI baud rate divisor as shown in Table 14-9. Reset clears
SCR2–SCR0.
14.8.8 ESCI Prescaler Register
The ESCI prescaler register (SCPSC) together with the ESCI baud rate register selects the baud rate for
both the receiver and the transmitter.
NOTE
There are two prescalers available to adjust the baud rate. One in the ESCI
baud rate register and one in the ESCI prescaler register.
Table 14-8. ESCI Baud Rate Prescaling
SCP[1:0]
Baud Rate Register
Prescaler Divisor (BPD)
00 1
01 3
10 4
11 13
Table 14-9. ESCI Baud Rate Selection
SCR[2:1:0] Baud Rate Divisor (BD)
000 1
001 2
010 4
011 8
100 16
101 32
110 64
111 128
Address: $0009
Bit 7654321Bit 0
Read:
PDS2 PDS1 PDS0 PSSB4 PSSB3 PSSB2 PSSB1 PSSB0
Write:
Reset:00000000
Figure 14-18. ESCI Prescaler Register (SCPSC)