Datasheet

Exception Control
MC68HC908GR16A Data Sheet, Rev. 1.0
Freescale Semiconductor 181
Interrupts are latched, and arbitration is performed in the SIM at the start of interrupt processing. The
arbitration result is a constant that the CPU uses to determine which vector to fetch. Once an interrupt is
latched by the SIM, no other interrupt can take precedence, regardless of priority, until the latched
interrupt is serviced (or the I bit is cleared). See Figure 15-10.
Figure 15-10. Interrupt Processing
NO
NO
YES
NO
NO
YES
NO
YES
AS MANY INTERRUPTS
I BIT SET?
FROM RESET
BREAK
I BIT SET?
IRQ
INTERRUPT?
SWI
INSTRUCTION?
RTI
INSTRUCTION?
FETCH NEXT
INSTRUCTION
UNSTACK CPU REGISTERS
STACK CPU REGISTERS
SET I BIT
LOAD PC WITH INTERRUPT VECTOR
EXECUTE INSTRUCTION
YES
YES
AS EXIST ON CHIP
INTERRUPT?