Datasheet

SIM Registers
MC68HC908GR16A Data Sheet, Rev. 1.0
Freescale Semiconductor 187
Figure 15-18. Stop Mode Entry Timing
Figure 15-19. Stop Mode Recovery from Interrupt
15.7 SIM Registers
The SIM has three memory-mapped registers. Table 15-4 shows the mapping of these registers.
15.7.1 SIM Break Status Register
The SIM break status register (SBSR) contains a flag to indicate that a break caused an exit from wait
mode. This register is only used in emulation mode.
Table 15-4. SIM Registers
Address Register Access Mode
$FE00 SBSR User
$FE01 SRSR User
$FE03 SBFCR User
Address: $FE00
Bit 7654321Bit 0
Read:
RRRRRR
SBSW
R
Write: Note
(1)
Reset:00000000
R= Reserved
1. Writing a 0 clears SBSW.
Figure 15-20. Break Status Register (SBSR)
STOP ADDR + 1 SAME SAMEIAB
IDB
PREVIOUS DATA NEXT OPCODE SAME
STOP ADDR
SAME
R/W
CPUSTOP
Note: Previous data can be operand data or the STOP opcode, depending
on the last instruction.
CGMXCLK
INT/BREAK
IAB
STOP + 2 STOP + 2 SP SP – 1 SP – 2 SP – 3
STOP +1
STOP RECOVERY PERIOD