Datasheet

Interrupts
MC68HC908GR16 Data Sheet, Rev. 5.0
Freescale Semiconductor 139
After every instruction, the CPU checks all pending interrupts if the I bit is not set. If more than one
interrupt is pending when an instruction is done, the highest priority interrupt is serviced first. In the
example shown in Figure 13-4, if an interrupt is pending upon exit from the interrupt service routine, the
pending interrupt is serviced before the LDA instruction is executed.
Figure 13-4
. Interrupt Recognition Example
The LDA opcode is prefetched by both the INT1 and INT2 RTI instructions. However, in the case of the
INT1 RTI prefetch, this is a redundant operation.
NOTE
To maintain compatibility with the M6805 Family, the H register is not
pushed on the stack during interrupt entry. If the interrupt service routine
modifies the H register or uses the indexed addressing mode, save the H
register and then restore it prior to exiting the routine.
See Figure 13-5 for a flowchart depicting interrupt processing.
13.3.2 Sources
The sources in Table 13-1 can generate CPU interrupt requests.
CLI
LDA
INT1
PULH
RTI
INT2
BACKGROUND
#$FF
PSHH
INT1 INTERRUPT SERVICE ROUTINE
PULH
RTI
PSHH
INT2 INTERRUPT SERVICE ROUTINE
ROUTINE