Datasheet

Enhanced Serial Communications Interface (ESCI) Module
MC68HC908GR16 Data Sheet, Rev. 5.0
150 Freescale Semiconductor
The baud rate clock source for the ESCI can be selected via the configuration bit, ESCIBDSRC, of the
CONFIG2 register ($001E).
For reference, a summary of the ESCI module input/output registers is provided in Figure 14-3.
14.4.1 Data Format
The SCI uses the standard non-return-to-zero mark/space data format illustrated in Figure 14-4.
Addr.Register Name Bit 7654321Bit 0
$0009
ESCI Prescaler Register
(SCPSC)
See page 170.
Read:
PDS2 PDS1 PDS0 PSSB4 PSSB3 PSSB2 PSSB1 PSSB0
Write:
Reset:00000000
$000A
ESCI Arbiter Control
Register (SCIACTL)
See page 174.
Read:
AM1
ALOST
AM0 ACLK
AFIN ARUN AROVFL ARD8
Write:
Reset:00000000
$000B
ESCI Arbiter Data
Register (SCIADAT)
See page 175.
Read: ARD7 ARD6 ARD5 ARD4 ARD3 ARD2 ARD1 ARD0
Write:
Reset:00000000
$0013
ESCI Control Register 1
(SCC1)
See page 161.
Read:
LOOPS ENSCI TXINV M WAKE ILTY PEN PTY
Write:
Reset:00000000
$0014
ESCI Control Register 2
(SCC2)
See page 163.
Read:
SCTIE TCIE SCRIE ILIE TE RE RWU SBK
Write:
Reset:00000000
$0015
ESCI Control Register 3
(SCC3)
See page 164.
Read: R8
T8 R R ORIE NEIE FEIE PEIE
Write:
Reset:U0000000
$0016
ESCI Status Register 1
(SCS1)
See page 165.
Read: SCTE TC SCRF IDLE OR NF FE PE
Write:
Reset:11000000
$0017
ESCI Status Register 2
(SCS2)
See page 168.
Read:000000BKFRPF
Write:
Reset:00000000
$0018
ESCI Data Register
(SCDR)
See page 168.
Read: R7 R6 R5 R4 R3 R2 R1 R0
Write: T7 T6 T5 T4 T3 T2 T1 T0
Reset: Unaffected by reset
$0019
ESCI Baud Rate Register
(SCBR)
See page 169.
Read:
LINT LINR SCP1 SCP0 R SCR2 SCR1 SCR0
Write:
Reset:00000000
= Unimplemented R = Reserved
Figure 14-3. ESCI I/O Register Summary