Datasheet

System Integration Module (SIM)
MC68HC908GR16 Data Sheet, Rev. 5.0
192 Freescale Semiconductor
Figure 15-20. Stop Mode Recovery from Interrupt
15.7 SIM Registers
The SIM has three memory-mapped registers. Table 15-4 shows the mapping of these registers.
15.7.1 Break Status Register
The break status register (BSR) contains a flag to indicate that a break caused an exit from wait mode.
This register is only used in emulation mode.
SBSW — SIM Break Stop/Wait
SBSW can be read within the break state SWI routine. The user can modify the return address on the
stack by subtracting one from it.
1 = Wait mode was exited by break interrupt.
0 = Wait mode was not exited by break interrupt.
Table 15-4. SIM Registers
Address Register Access Mode
$FE00 BSR User
$FE01 SRSR User
$FE03 BFCR User
Address: $FE00
Bit 7654321Bit 0
Read:
RRRRRR
SBSW
R
Write: Note
(1)
Reset:00000000
R= Reserved
1. Writing a 0 clears SBSW.
Figure 15-21. Break Status Register (BSR)
CGMXCLK
INT/BREAK
IAB
STOP + 2 STOP + 2 SP SP – 1 SP – 2 SP – 3
STOP +1
STOP RECOVERY PERIOD