Datasheet

Functional Description
MC68HC908GR16 Data Sheet, Rev. 5.0
Freescale Semiconductor 225
18.4.1 TIM Counter Prescaler
The TIM clock source can be one of the seven prescaler outputs. The prescaler generates seven clock
rates from the internal bus clock. The prescaler select bits, PS[2:0], in the TIM status and control register
select the TIM clock source.
18.4.2 Input Capture
With the input capture function, the TIM can capture the time at which an external event occurs. When an
active edge occurs on the pin of an input capture channel, the TIM latches the contents of the TIM counter
$002C
Timer 2 Counter
Register High (T2CNTH)
See page 232.
Read: Bit 15 14 13 12 11 10 9 Bit 8
Write:
Reset:00000000
$002D
Timer 2 Counter
Register Low (T2CNTL)
See page 232.
Read:Bit 7654321Bit 0
Write:
Reset:00000000
$002E
Timer 2 Counter Modulo Reg-
ister High (T2MODH)
See page 233.
Read:
Bit 15 14 13 12 11 10 9 Bit 8
Write:
Reset:11111111
$002F
Timer 2 Counter Modulo
Register Low (T2MODL)
See page 233.
Read:
Bit 7654321Bit 0
Write:
Reset:11111111
$0030
Timer 2 Channel 0 Status and
Control Register (T2SC0)
See page 233.
Read: CH0F
CH0IE MS0B MS0A ELS0B ELS0A TOV0 CH0MAX
Write: 0
Reset:00000000
$0031
Timer 2 Channel 0
Register High (T2CH0H)
See page 236.
Read:
Bit 15 14 13 12 11 10 9 Bit 8
Write:
Reset: Indeterminate after reset
$0032
Timer 2 Channel 0
Register Low (T2CH0L)
See page 236.
Read:
Bit 7654321Bit 0
Write:
Reset: Indeterminate after reset
$0033
Timer 2 Channel 1 Status and
Control Register (T2SC1)
See page 234.
Read: CH1F
CH1IE
0
MS1A ELS1B ELS1A TOV1 CH1MAX
Write: 0
Reset:00000000
$0034
Timer 2 Channel 1
Register High (T2CH1H)
See page 236.
Read:
Bit 15 14 13 12 11 10 9 Bit 8
Write:
Reset: Indeterminate after reset
$0035
Timer 2 Channel 1
Register Low (T2CH1L)
See page 236.
Read:
Bit 7654321Bit 0
Write:
Reset: Indeterminate after reset
Addr.Register Name Bit 7654321Bit 0
= Unimplemented
Figure 18-3. TIM I/O Register Summary (Sheet 2 of 2)