Datasheet

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MC68HC908GR16 Data Sheet, Rev. 5.0
240 Freescale Semiconductor
19.2.2.2 Break Address Registers
The break address registers (BRKH and BRKL) contain the high and low bytes of the desired breakpoint
address. Reset clears the break address registers.
19.2.2.3 Break Auxiliary Register
The break auxiliary register (BRKAR) contains a bit that enables software to disable the COP while the
MCU is in a state of break interrupt with monitor mode.
BDCOP — Break Disable COP Bit
This read/write bit disables the COP during a break interrupt. Reset clears the BDCOP bit.
1 = COP disabled during break interrupt
0 = COP enabled during break interrupt.
Address:
$FE09
Bit 7654321Bit 0
Read:
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8
Write:
Reset:00000000
Figure 19-4. Break Address Register High (BRKH)
Address:
$FE0A
Bit 7654321Bit 0
Read:
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Write:
Reset:00000000
Figure 19-5. Break Address Register Low (BRKL)
Address:
$FE02
Bit 7654321Bit 0
Read:0000000
BDCOP
Write:
Reset:00000000
= Unimplemented
Figure 19-6. Break Auxiliary Register (BRKAR)