Datasheet

MC68HC908GR16 Data Sheet, Rev. 5.0
246 Freescale Semiconductor Development Support
Table 19-1. Monitor Mode Signal Requirements and Options
Mode IRQ RST
Reset
Vector
Serial
Communication
Mode
Selection
Divider
PLL COP
Communication
Speed
Comments
PTA0 PTA1 PTB0 PTB1 PTB4
External
Clock
Bus
Frequency
Baud
Rate
— X GND X X X X X X X X X X X Reset condition
Normal
Monitor
V
TST
V
DD
or
V
TST
X 1 0 1 0 0 OFF Disabled
4.9152
MHz
2.4576
MHz
9600
V
TST
V
DD
or
V
TST
X 1 0 1 0 1 OFF Disabled
9.8304
MHz
2.4576
MHz
9600
Forced
Monitor
V
DD
V
DD
$FF
(blank)
1 0 X X X OFF Disabled 16 MHz 4 MHz 9600
GND
V
DD
$FF
(blank)
1 0 X X X ON Disabled
32.768
kHz
2.4576
MHz
9600
User
V
DD
or
GND
V
DD
or
V
TST
$FF
(blank)
X X X X X OFF Enabled X X X
User mode —
illegal address reset
V
DD
or
GND
V
DD
or
V
TST
Not
$FF X X X X X X Enabled X X X
MON08
Function
[Pin No.]
V
TST
[6]
RST
[5]
—
COM
[8]
SSEL
[10]
MOD0
[12]
MOD1
[14]
DIV4
[16]
——
OSC1
[13]
——
1. PTA0 must have a pullup resistor to V
DD
in monitor mode.
2. Communication speed in the table is an example to obtain a baud rate of 9600. Baud rate using external oscillator is bus frequency / 256.
3. External clock is an 32.768 kHz crystal on OSC1 and OSC2 or a 32.768 kHz, 4.9152 MHz, or 9.8304 MHz canned oscillator on OSC1.
4. X = don’t care
5. MON08 pin refers to P&E Microcomputer Systems’ MON08-Cyclone 2 by 8-pin connector.
NC 1 2 GND
NC 3 4 RST
NC 5 6 IRQ
NC 7 8 PTA0
NC 9 10 PTA1
NC 11 12 PTB0
OSC1 13 14 PTB1
V
DD
15 16 PTB4