Datasheet

MC68HC908GR16 Data Sheet, Rev. 5.0
Freescale Semiconductor 27
Chapter 2
Memory
2.1 Introduction
The CPU08 can address 64 Kbytes of memory space. The memory map, shown in Figure 2-1, includes:
• 15,872 bytes of user FLASH memory
• 1024 bytes of random-access memory (RAM)
• 406 bytes of FLASH programming routines read-only memory (ROM)
• 44 bytes of user-defined vectors
• 350 bytes of monitor ROM
2.2 Unimplemented Memory Locations
Accessing an unimplemented location can cause an illegal address reset. In the memory map (Figure 2-1)
and in register figures in this document, unimplemented locations are shaded.
2.3 Reserved Memory Locations
Accessing a reserved location can have unpredictable effects on microcontroller (MCU) operation. In the
Figure 2-1 and in register figures in this document, reserved locations are marked with the word Reserved
or with the letter R.
2.4 Input/Output (I/O) Section
Most of the control, status, and data registers are in the zero page area of $0000–$003F. Additional I/O
registers have these addresses:
• $FE00; break status register, BSR
• $FE01; SIM reset status register, SRSR
• $FE02; break auxiliary register, BRKAR
• $FE03; break flag control register, BFCR
• $FE04; interrupt status register 1, INT1
• $FE05; interrupt status register 2, INT2
• $FE06; interrupt status register 3, INT3
• $FE07; reserved
• $FE08; FLASH control register, FLCR
• $FE09; break address register high, BRKH
• $FE0A; break address register low, BRKL
• $FE0B; break status and control register, BRKSCR
• $FE0C; LVI status register, LVISR
• $FF7E; FLASH block protect register, FLBPR