Datasheet

Memory
MC68HC908GR16 Data Sheet, Rev. 5.0
34 Freescale Semiconductor
$0035
Timer 2 Channel 1
Register Low (T2CH1L)
See page 236.
Read:
Bit 7654321Bit 0
Write:
Reset: Indeterminate after reset
$0036
PLL Control Register
(PCTL)
See page 70.
Read:
PLLIE
PLLF
PLLON BCS PRE1 PRE0 VPR1 VPR0
Write:
Reset:00100000
$0037
PLL Bandwidth Control
Register (PBWC)
See page 72.
Read:
AUTO
LOCK
ACQ
0000
R
Write:
Reset:00000000
$0038
PLL Multiplier Select High
Register (PMSH)
See page 73.
Read: 0000
MUL11 MUL10 MUL9 MUL8
Write:
Reset:00000000
$0039
PLL Multiplier Select Low
Register (PMSL)
See page 73.
Read:
MUL7 MUL6 MUL5 MUL4 MUL3 MUL2 MUL1 MUL0
Write:
Reset:01000000
$003A
PLL VCO Select Range
Register (PMRS)
See page 74.
Read:
VRS7 VRS6 VRS5 VRS4 VRS3 VRS2 VRS1 VRS0
Write:
Reset:01000000
$003B
PLL Reference Divider
Select Register (PMDS)
See page 74.
Read: 0000
RDS3 RDS2 RDS1 RDS0
Write:
Reset:00000001
$003C
ADC Status and Control
Register (ADSCR)
See page 53.
Read: COCO
AIEN ADCO ADCH4 ADCH3 ADCH2 ADCH1 ADCH0
Write: R
Reset:00011111
$003D
ADC Data High Register
(ADRH)
See page 55.
Read: 000000AD9AD9
Write:
Reset: Unaffected by reset
$003E
ADC Data Low Register
(ADRL)
See page 55.
Read: AD7 AD6 AD5 AD4 A3 AD2 AD1 AD0
Write:
Reset: Unaffected by reset
$003F
ADC Clock Register
(ADCLK)
See page 57.
Read:
ADIV2 ADIV1 ADIV0 ADICLK MODE1 MODE0 R
0
Write:
Reset:00000100
$FE00
Break Status Register
(BSR)
See page 241.
Read:
RRRRRR
SBSW
R
Write: (Note 2)
Reset:00000000
2. Writing a 0 clears SBSW.
Addr.Register Name Bit 7654321Bit 0
= Unimplemented R = Reserved U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 6 of 8)