Datasheet

Clock Generator Module (CGM)
MC68HC908GR16 Data Sheet, Rev. 5.0
68 Freescale Semiconductor
4.4.4 PLL Analog Power Pin (V
DDA
)
V
DDA
is a power pin used by the analog portions of the PLL. Connect the V
DDA
pin to the same voltage
potential as the V
DD
pin.
NOTE
Route V
DDA
carefully for maximum noise immunity and place bypass
capacitors as close as possible to the package.
4.4.5 PLL Analog Ground Pin (V
SSA
)
V
SSA
is a ground pin used by the analog portions of the PLL. Connect the V
SSA
pin to the same voltage
potential as the V
SS
pin.
NOTE
Route V
SSA
carefully for maximum noise immunity and place bypass
capacitors as close as possible to the package.
4.4.6 Oscillator Enable Signal (SIMOSCEN)
The SIMOSCEN signal comes from the system integration module (SIM) and enables the oscillator and
PLL.
4.4.7 Oscillator Stop Mode Enable Bit (OSCSTOPENB)
OSCSTOPENB is a bit in the CONFIG register that enables the oscillator to continue operating during
stop mode. If this bit is set, the Oscillator continues running during stop mode. If this bit is not set (default),
the oscillator is controlled by the SIMOSCEN signal which will disable the oscillator during stop mode.
4.4.8 Crystal Output Frequency Signal (CGMXCLK)
CGMXCLK is the crystal oscillator output signal. It runs at the full speed of the crystal (f
XCLK
) and comes
directly from the crystal oscillator circuit. Figure 4-2 shows only the logical relation of CGMXCLK to OSC1
and OSC2 and may not represent the actual circuitry. The duty cycle of CGMXCLK is unknown and may
depend on the crystal and other external factors. Also, the frequency and amplitude of CGMXCLK can be
unstable at startup.
4.4.9 CGM Base Clock Output (CGMOUT)
CGMOUT is the clock output of the CGM. This signal goes to the SIM, which generates the MCU clocks.
CGMOUT is a 50 percent duty cycle clock running at twice the bus frequency. CGMOUT is software
programmable to be either the oscillator output, CGMXCLK, divided by two or the VCO clock, CGMVCLK,
divided by two.
4.4.10 CGM CPU Interrupt (CGMINT)
CGMINT is the interrupt signal generated by the PLL lock detector.