Datasheet

Low-Power Modes
MC68HC908GR60A • MC68HC908GR48A • MC68HC908GR32A Data Sheet, Rev. 5
126 Freescale Semiconductor
10.15 Exiting Stop Mode
These events restart the system clocks and load the program counter with the reset vector or with an
interrupt vector:
• External reset — A low on the RST
pin resets the MCU and loads the program counter with the
contents of locations $FFFE and $FFFF.
• External interrupt — A high-to-low transition on an external interrupt pin loads the program counter
with the contents of locations:
– $FFFA and $FFFB; IRQ
pin
– $FFE0 and $FFE1; keyboard interrupt pins (low-to-high transition when KBIPx bits are set)
• Low-voltage inhibit (LVI) reset — A power supply voltage below the V
TRIPF
voltage resets the MCU
and loads the program counter with the contents of locations $FFFE and $FFFF.
• Break interrupt — In emulation mode, a break interrupt loads the program counter with the contents
of locations $FFFC and $FFFD.
• Timebase module (TBM) interrupt — A TBM interrupt loads the program counter with the contents
of locations $FFDC and $FFDD when the timebase counter has rolled over. This allows the TBM
to generate a periodic wakeup from stop mode.
Upon exit from stop mode, the system clocks begin running after an oscillator stabilization delay. A 12-bit
stop recovery counter inhibits the system clocks for 4096 CGMXCLK cycles after the reset or external
interrupt.
The short stop recovery bit, SSREC, in the CONFIG1 register controls the oscillator stabilization delay
during stop recovery. Setting SSREC reduces stop recovery time from 4096 CGMXCLK cycles to 32
CGMXCLK cycles.
NOTE
Use the full stop recovery time (SSREC = 0) in applications that use an
external crystal unless the OSCENINSTOP bit is set.