Datasheet

Port E
MC68HC908GR60A • MC68HC908GR48A • MC68HC908GR32A Data Sheet, Rev. 5
Freescale Semiconductor 145
12.6.3 Port D Input Pullup Enable Register
The port D input pullup enable register (PTDPUE) contains a software configurable pullup device for each
of the eight port D pins. Each bit is individually configurable and requires that the data direction register,
DDRD, bit be configured as an input. Each pullup is automatically and dynamically disabled when a port
bit’s DDRD is configured for output mode.
PTDPUE7–PTDPUE0 — Port D Input Pullup Enable Bits
These writable bits are software programmable to enable pullup devices on an input port bit.
1 = Corresponding port D pin configured to have internal pullup
0 = Corresponding port D pin has internal pullup disconnected
12.7 Port E
Port E is a 6-bit special-function port that shares two of its pins with the enhanced serial communications
interface (ESCI) module.
12.7.1 Port E Data Register
The port E data register contains a data latch for each of the six port E pins.
PTE5–PTE0 — Port E Data Bits
These read/write bits are software-programmable. Data direction of each port E pin is under the control
of the corresponding bit in data direction register E. Reset has no effect on port E data.
NOTE
Data direction register E (DDRE) does not affect the data direction of port
E pins that are being used by the ESCI module. However, the DDRE bits
always determine whether reading port E returns the states of the latches
or the states of the pins. See Table 12-6.
Address: $000F
Bit 7654321Bit 0
Read:
PTDPUE7 PTDPUE6 PTDPUE5 PTDPUE4 PTDPUE3 PTDPUE2 PTDPUE1 PTDPUE0
Write:
Reset:00000000
Figure 12-16. Port D Input Pullup Enable Register (PTDPUE)
Address: $0008
Bit 7654321Bit 0
Read: 0 0
PTE5 PTE4 PTE3 PTE2 PTE1 PTE0
Write:
Reset: Unaffected by reset
Alternate Function:
RxD TxD
= Unimplemented
Figure 12-17. Port E Data Register (PTE)