Datasheet

MC68HC908GR60A • MC68HC908GR48A • MC68HC908GR32A Data Sheet, Rev. 5
Freescale Semiconductor 241
Chapter 18
Timer Interface Module (TIM2)
18.1 Introduction
This section describes the timer interface module (TIM2). The TIM2 is a 6-channel timer that provides a
timing reference with input capture, output compare, and pulse-width-modulation functions. Figure 18-2
is a block diagram of the TIM2.
18.2 Features
Features of the TIM2 include:
• Six input capture/output compare channels:
– Rising-edge, falling-edge, or any-edge input capture trigger
– Set, clear, or toggle output compare action
• Buffered and unbuffered pulse width modulation (PWM) signal generation
• Programmable TIM2 clock input
– 7-frequency internal bus clock prescaler selection
– External TIM2 clock input (4-MHz maximum frequency)
• Free-running or modulo up-count operation
• Toggle any channel pin on overflow
• TIM2 counter stop and reset bits
18.3 Functional Description
Figure 18-2 shows the TIM2 structure. The central component of the TIM2 is the 16-bit TIM2 counter that
can operate as a free-running counter or a modulo up-counter. The TIM2 counter provides the timing
reference for the input capture and output compare functions. The TIM2 counter modulo registers,
T2MODH:T2MODL, control the modulo value of the TIM2 counter. Software can read the TIM2 counter
value at any time without affecting the counting sequence.
The six TIM2 channels are programmable independently as input capture or output compare channels.