Datasheet

Timer Interface Module (TIM2)
MC68HC908GR60A • MC68HC908GR48A • MC68HC908GR32A Data Sheet, Rev. 5
254 Freescale Semiconductor
18.8.2 TIM2 Counter Registers
The two read-only TIM2 counter registers contain the high and low bytes of the value in the TIM2 counter.
Reading the high byte (T2CNTH) latches the contents of the low byte (T2CNTL) into a buffer. Subsequent
reads of T2CNTH do not affect the latched T2CNTL value until T2CNTL is read. Reset clears the TIM2
counter registers. Setting the TIM2 reset bit (TRST) also clears the TIM2 counter registers.
NOTE
If T2CNTH is read during a break interrupt, be sure to unlatch T2CNTL by
reading T2CNTL before exiting the break interrupt. Otherwise, T2CNTL
retains the value latched during the break.
18.8.3 TIM2 Counter Modulo Registers
The read/write TIM2 modulo registers contain the modulo value for the TIM2 counter. When the TIM2
counter reaches the modulo value, the overflow flag (TOF) becomes set, and the TIM2 counter resumes
counting from $0000 at the next timer clock. Writing to the high byte (T2MODH) inhibits the TOF bit and
overflow interrupts until the low byte (T2MODL) is written. Reset sets the TIM2 counter modulo registers.
NOTE
Reset the TIM2 counter before writing to the TIM2 counter modulo registers.
Address: $002C T2CNTH
Bit 7654321Bit 0
Read: BIT 15 BIT 14 BIT 13 BIT 12 BIT 11 BIT 10 BIT 9 BIT 8
Write:
Reset:00000000
Address: $002D T2CNTL
Bit 7654321Bit 0
Read: BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
Write:
Reset:00000000
= Unimplemented
Figure 18-6. TIM2 Counter Registers (T2CNTH and T2CNTL)
Address: $002E T2MODH
Bit 7654321Bit 0
Read:
BIT 15 BIT 14 BIT 13 BIT 12 BIT 11 BIT 10 BIT 9 BIT 8
Write:
Reset:11111111
Address: $002F T2MODL
Bit 7654321Bit 0
Read:
BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
Write:
Reset:11111111
Figure 18-7. TIM2 Counter Modulo Registers (T2MODH and T2MODL)