Datasheet

Electrical Specifications
MC68HC908GR60A • MC68HC908GR48A • MC68HC908GR32A Data Sheet, Rev. 5
284 Freescale Semiconductor
20.9 Clock Generation Module (CGM) Characteristics
20.9.1 CGM Operating Conditions
20.9.2 CGM Component Information
Characteristic Symbol Min Typ Max Unit
Operating voltage
V
DDA
V
SSA
V
DD
– 0.3
V
SS
– 0.3
—
—
V
DD
+ 0.3
V
SS
+ 0.3
V
Crystal reference frequency
f
RCLK
1—8MHz
Input clock frequency (PLL off)
(1)
1. External square wave applied to OSC1. Voltage levels must be rail-to-rail and duty cycle must be 50%.
f
XCLK
——32MHz
Range nominal multiplier
f
NOM
— 71.42 — kHz
VCO center-of-range frequency
(2)
2. Range of frequencies that VCO can produce to generate input clock to frequency divider during acquisition and tracking
modes.
f
VRS
71.42k — 40M Hz
VCO operating frequency
(3)
3. Allowed VCO operating range.
f
VCLK
71.42k — 32M Hz
Characteristic Symbol Min Typ Max Unit
Crystal frequency
f
XCLK
1—8MHz
Crystal load capacitance
(1)
1. Consult crystal manufacturer’s specification.
C
L
—20—pF
Crystal fixed capacitance
(2)
2. Capacitor on OSC1 pin. Does not include parasitic capacitance due to package, pin, and board.
C
1
—
(2 x C
L
) – 5
47 pF
Crystal tuning capacitance
(3)
3. Capacitor on OSC2 pin. Does not include parasitic capacitance due to package, pin, and board.
C
2
—
(2 x C
L
) – 5
47 pF
Feedback bias resistor
R
B
—110MΩ
Series damping resistor
R
S
00—kΩ
V
DDA
/V
SSA
bypass capacitor C
byp
—0.1—μF
CGMXFC filter values See Table 4-5. Example Filter Component Values