Datasheet

Analog-to-Digital Converter (ADC)
MC68HC908GR60A • MC68HC908GR48A • MC68HC908GR32A Data Sheet, Rev. 5
64 Freescale Semiconductor
down the ADC by setting ADCH4–ADCH0 bits in the ADC status and control register before executing the
WAIT instruction.
3.6.2 Stop Mode
The ADC module is inactive after the execution of a STOP instruction. Any pending conversion is aborted.
ADC conversions resume when the MCU exits stop mode after an external interrupt. Allow one
conversion cycle to stabilize the analog circuitry.
3.7 I/O Signals
The ADC module has eight pins shared with port A and the KBI module:
PTA7/KBD7/AD15–PTA0/KBD0/AD8
The ADC module has eight pins shared with port B:
PTB7/AD7–PTB0/AD0
The ADC module has eight pins shared with port G:
PTG7/AD23–PTG0/AD16
3.7.1 ADC Analog Power Pin (V
DDAD
)
The ADC analog portion uses V
DDAD
as its power pin. Connect the V
DDAD
pin to the same voltage
potential as V
DD
. External filtering may be necessary to ensure clean V
DDAD
for good results.
NOTE
For maximum noise immunity, route V
DDAD
carefully and place bypass
capacitors as close as possible to the package.
V
DDAD
and V
REFH
are bonded internally.
3.7.2 ADC Analog Ground Pin (V
SSAD
)
The ADC analog portion uses V
SSAD
as its ground pin. Connect the V
SSAD
pin to the same voltage
potential as V
SS
.
NOTE
Route V
SSAD
cleanly to avoid any offset errors.
V
SSAD
and V
REFL
are bonded internally.
3.7.3 ADC Voltage Reference High Pin (V
REFH
)
The ADC analog portion uses V
REFH
as its upper voltage reference pin. By default, connect the V
REFH
pin to the same voltage potential as V
DD
. External filtering is often necessary to ensure a clean V
REFH
for
good results. Any noise present on this pin will be reflected and possibly magnified in A/D conversion
values.
NOTE
For maximum noise immunity, route V
REFH
carefully and place bypass
capacitors as close as possible to the package. Routing V
REFH
close and
parallel to V
REFL
may improve common mode noise rejection.
V
DDAD
and V
REFH
are bonded internally.