Datasheet

Interrupts
MC68HC908GZ16 • MC68HC908GZ8 Data Sheet, Rev. 4
Freescale Semiconductor 179
• Bus Off bit (BOFFIF) — BOFFIF is set when the transmit error counter has exceeded 255 and
MSCAN08 has gone to bus off state. The bus off interrupt enable bit, BOFFIE, enables BOFFIF to
generate MSCAN08 error CPU interrupt requests. BOFFIF is in MSCAN08 receiver flag register.
BOFFIE is in MSCAN08 receiver interrupt enable register.
14.3.3 Interrupt Status Registers
The flags in the interrupt status registers identify maskable interrupt sources. Table 14-2 summarizes the
interrupt sources and the interrupt status register flags that they set. The interrupt status registers can be
useful for debugging.
Table 14-2. Interrupt Source Flags
Interrupt
Source
Interrupt Status
Register Flag
Reset —
SWI instruction —
IRQ
pin IF1
CGM change of lock IF2
TIM1 channel 0 IF3
TIM1 channel 1 IF4
TIM1 overflow IF5
TIM2 channel 0 IF6
TIM2 channel 1 IF7
TIM2 overflow IF8
SPI receive IF9
SPI transmit IF10
SCI error IF11
SCI receive IF12
SCI transmit IF13
Keyboard IF14
ADC conversion complete IF15
Timebase IF16
MSCAN08 wakeup IF17
MSCAN08 error IF18
MSCAN08 receive IF19
MSCAN08 transmit IF20