Datasheet

Enhanced Serial Communications Interface (ESCI) Module
MC68HC908GZ16 • MC68HC908GZ8 Data Sheet, Rev. 4
186 Freescale Semiconductor
15.4.1 Data Format
The SCI uses the standard non-return-to-zero mark/space data format illustrated in Figure 15-4.
Figure 15-4. SCI Data Formats
15.4.2 Transmitter
Figure 15-5 shows the structure of the SCI transmitter and the registers are summarized in Figure 15-3.
The baud rate clock source for the ESCI can be selected via the configuration bit, ESCIBDSRC.
Figure 15-5. ESCI Transmitter
BIT 5BIT 0 BIT 1
BIT 0 BIT 1 BIT 2 BIT 3 BIT 4 BIT 5 BIT 6 BIT 7 BIT 8
BIT 2 BIT 3 BIT 4 BIT 6 BIT 7
PARITY
OR DATA
BIT
PARITY
OR DATA
BIT
NEXT
START
BIT
NEXT
START
BIT
STOP
BIT
STOP
BIT
8-BIT DATA FORMAT
(BIT M IN SCC1 CLEAR)
9-BIT DATA FORMAT
(BIT M IN SCC1 SET)
START
BIT
START
BIT
PEN
PTY
H876543210L
11-BIT
TRANSMIT
STOP START
T8
SCTE
SCTIE
TCIE
SBK
TC
BUS CLOCK
PARITY
GENERATION
MSB
ESCI DATA REGISTER
LOAD FROM SCDR SHIFT ENABLE
PREAMBLE
(ALL ONES)
BREAK (ALL ZEROS)
TRANSMITTER
CONTROL LOGIC
SHIFT REGISTER
TC
SCTIE
TCIE
SCTE
TRANSMITTER CPU INTERRUPT REQUEST
M
ENSCI
LOOPS
TE
TXINV
INTERNAL BUS
÷ 4
PRE-
SCALER
SCP1
SCP0
SCR2
SCR1
SCR0
BAUD
DIVIDER
÷ 16
SCI_TxD
PRE-
SCALER
PDS1
PDS2
PDS0
PSSB3
PSSB4
PSSB2
PSSB1
PSSB0
LINT