Datasheet

FLASH Memory (FLASH)
MC68HC908GZ16 • MC68HC908GZ8 Data Sheet, Rev. 4
Freescale Semiconductor 39
The address ranges for the user memory and vectors are:
$C000–$FDFF; user memory
•$FE08
; FLASH control register
$FF7E; FLASH block protect register
$FFD4–$FFFF; these locations are reserved for user-defined interrupt and reset vectors
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more information.
NOTE
A security feature prevents viewing of the FLASH contents.
(1)
2.6.2 FLASH Control Register
The FLASH control register (FLCR) controls FLASH program and erase operations.
HVEN — High-Voltage Enable Bit
This read/write bit enables the charge pump to drive high voltages for program and erase operations
in the array. HVEN can only be set if either PGM = 1 or ERASE = 1 and the proper sequence for
program or erase is followed.
1 = High voltage enabled to array and charge pump on
0 = High voltage disabled to array and charge pump off
MASS — Mass Erase Control Bit
Setting this read/write bit configures the 16-Kbyte FLASH array for mass erase operation.
1 = MASS erase operation selected
0 = PAGE erase operation selected
ERASE — Erase Control Bit
This read/write bit configures the memory for erase operation. ERASE is interlocked with the PGM bit
such that both bits cannot be equal to 1 or set to 1 at the same time.
1 = Erase operation selected
0 = Erase operation unselected
PGM — Program Control Bit
This read/write bit configures the memory for program operation. PGM is interlocked with the ERASE
bit such that both bits cannot be equal to 1 or set to 1 at the same time.
1 = Program operation selected
0 = Program operation unselected
1. No security feature is absolutely secure. However, Freescale’s strategy is to make reading or copying the FLASH difficult for
unauthorized users.
Address: $FE08
Bit 7654321Bit 0
Read:0000
HVEN MASS ERASE PGM
Write:
Reset:00000000
= Unimplemented
Figure 2-3. FLASH Control Register (FLCR)