Datasheet

Port C
MC68HC908GZ16 • MC68HC908GZ8 Data Sheet, Rev. 4
Freescale Semiconductor 163
DDRC6–DDRC0 — Data Direction Register C Bits
These read/write bits control port C data direction. Reset clears DDRC6–DDRC0, configuring all port
C pins as inputs.
1 = Corresponding port C pin configured as output
0 = Corresponding port C pin configured as input
NOTE
Avoid glitches on port C pins by writing to the port C data register before
changing data direction register C bits from 0 to 1.
Figure 13-11 shows the port C I/O logic.
Figure 13-11. Port C I/O Circuit
When bit DDRCx is a logic 1, reading address $0002 reads the PTCx data latch. When bit DDRCx is a
logic 0, reading address $0002 reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit. Table 13-4 summarizes the operation of the port C pins.
Table 13-4. Port C Pin Functions
PTCPUE
Bit
DDRC
Bit
PTC
Bit
I/O Pin
Mode
Accesses to DDRC Accesses to PTC
Read/Write Read Write
10
X
(1)
1. X = Don’t care
Input, V
DD
(2)
2. I/O pin pulled up to V
DD
by internal pullup device.
DDRC6–DDRC0 Pin
PTC6–PTC0
(3)
3. Writing affects data register, but does not affect input.
00X
Input, Hi-Z
(4)
4. Hi-Z = High impedance
DDRC6–DDRC0 Pin
PTC6–PTC0
(3)
X 1 X Output DDRC6–DDRC0 PTC6–PTC0 PTC6–PTC0
READ DDRC ($0006)
WRITE DDRC ($0006)
RESET
WRITE PTC ($0002)
READ PTC ($0002)
PTCx
DDRCx
PTCx
INTERNAL DATA BUS
V
DD
INTERNAL
PTCPUEx
PULLUP
DEVICE