Datasheet

Functional Description
MC68HC908GZ60 • MC68HC908GZ48 • MC68HC908GZ32 Data Sheet, Rev. 6
Freescale Semiconductor 117
The KBIP7–KBIP0 bits determine the polarity of the keyboard pin detection. These bits along with the
MODEK bit determine whether a logic level (0 or 1) and/or a falling (or rising) edge is being detected.
• If the keyboard interrupt is edge-sensitive only, a falling (or rising) edge on a keyboard pin does not
latch an interrupt request if another keyboard pin is already asserted. To prevent losing an interrupt
request on one pin because another pin is still asserted, software can disable the latter pin while it
is asserted.
• If the keyboard interrupt is edge and level sensitive, an interrupt request is present as long as any
keyboard interrupt pin is asserted and the pin is keyboard interrupt enabled.
Figure 9-2. Keyboard Module Block Diagram
Addr.Register Name Bit 7654321Bit 0
$001A
Keyboard Status and Control
Register (INTKBSCR)
See page 120.
Read:0000KEYF 0
IMASKK MODEK
Write:
ACKK
Reset:00000000
$001B
Keyboard Interrupt Enable
Register (INTKBIER)
See page 121.
Read:
KBIE7 KBIE6 KBIE5 KBIE4 KBIE3 KBIE2 KBIE1 KBIE0
Write:
Reset:00000000
$0448
Keyboard Interrupt Polarity
Register (INTKBIPR)
See page 121.
Read:
KBIP7 KBIP6 KBIP5 KBIP4 KBIP3 KBIP2 KBIP1 KBIP0
Write:
Reset:00000000
= Unimplemented
Figure 9-3. I/O Register Summary
KEYBOARD
INTERRUPT
REQUEST
VECTOR FETCH
DECODER
ACKK
INTERNAL BUS
RESET
KBIE0
KBD0
0
1
S
KBIP0
KBIE7
KBD7
0
1
S
KBIP7
DQ
CK
CLR
V
DD
MODEK
IMASKK
SYNCHRONIZER
KEYF
TO PULLUP/
TO PULLUP/
PULLDOWN ENABLE
PULLDOWN ENABLE