Datasheet

Port F
MC68HC908GZ60 • MC68HC908GZ48 • MC68HC908GZ32 Data Sheet, Rev. 6
Freescale Semiconductor 185
13.8 Port F
Port F is an 8-bit special-function port that shares four of its pins with the timer interface (TIM2) module.
13.8.1 Port F Data Register
The port F data register (PTF) contains a data latch for each of the eight port F pins.
PTF7–PTF0 — Port F Data Bits
These read/write bits are software-programmable. Data direction of each port F pin is under the control
of the corresponding bit in data direction register F. Reset has no effect on port F data.
T2CH5–T2CH2 — Timer 2 Channel I/O Bits
The PTF7/T2CH5–PTF4/T2CH2 pins are the TIM2 input capture/output compare pins. The edge/level
select bits, ELSxB:ELSxA, determine whether the PTF7/T2CH5–PTF4/T2CH2 pins are timer channel
I/O pins or general-purpose I/O pins. See Chapter 18 Timer Interface Module (TIM1) and Chapter 19
Timer Interface Module (TIM2).
13.8.2 Data Direction Register F
Data direction register F (DDRF) determines whether each port F pin is an input or an output. Writing a 1
to a DDRF bit enables the output buffer for the corresponding port F pin; a 0 disables the output buffer.
DDRF7–DDRF0 — Data Direction Register F Bits
These read/write bits control port F data direction. Reset clears DDRF7–DDRF0, configuring all port F
pins as inputs.
1 = Corresponding port F pin configured as output
0 = Corresponding port F pin configured as input
NOTE
Avoid glitches on port F pins by writing to the port F data register before
changing data direction register F bits from 0 to 1.
Figure 13-22 shows the port F I/O logic.
Address: $0440
Bit 7654321Bit 0
Read:
PTF7 PTF6 PTF5 PTF4 PTF3 PTF2 PTF1 PTF0
Write:
Reset: Unaffected by reset
Alternate Function: T2CH5 T2CH4 T2CH3 T2CH2
= Unimplemented
Figure 13-20. Port F Data Register (PTF)
Address: $0444
Bit 7654321Bit 0
Read:
DDRF7 DDRF6 DDRF5 DDRF4 DDRF3 DDRF2 DDRF1 DDRF0
Write:
Reset:00000000
Figure 13-21. Data Direction Register F (DDRF)