Datasheet

I/O Registers
MC68HC908GZ60 • MC68HC908GZ48 • MC68HC908GZ32 Data Sheet, Rev. 6
Freescale Semiconductor 297
19.8.5 TIM2 Channel Registers
These read/write registers contain the captured TIM2 counter value of the input capture function or the
output compare value of the output compare function. The state of the TIM2 channel registers after reset
is unknown.
In input capture mode (MSxB:MSxA = 0:0), reading the high byte of the TIM2 channel x registers
(T2CHxH) inhibits input captures until the low byte (T2CHxL) is read.
In output compare mode (MSxB:MSxA ≠ 0:0), writing to the high byte of the TIM2 channel x registers
(T2CHxH) inhibits output compares until the low byte (T2CHxL) is written.
Address: $0031 T2CH0H
Bit 7654321Bit 0
Read:
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8
Write:
Reset: Indeterminate after reset
Address: $0032 T2CH0L
Bit 7654321Bit 0
Read:
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Write:
Reset: Indeterminate after reset
Address: $0034 T2CH1H
Bit 7654321Bit 0
Read:
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8
Write:
Reset: Indeterminate after reset
Address: $0035 T2CH1L
Bit 7654321Bit 0
Read:
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Write:
Reset: Indeterminate after reset
Address: $0457 T2CH2H
Bit 7654321Bit 0
Read:
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8
Write:
Reset: Indeterminate after reset
Address: $0458 T2CH2L
Bit 7654321Bit 0
Read:
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Write:
Reset: Indeterminate after reset
Figure 19-10. TIM2 Channel Registers (T2CH0H/L:T2CH5H/L)