Datasheet

MC68HC908GZ60 • MC68HC908GZ48 • MC68HC908GZ32 Data Sheet, Rev. 6
Freescale Semiconductor 5
October,
2006
5.0
12.2 Features — Corrected timer link connection from TIM2 channel 0 to
TIM1 channel 0.
135
12.9 Timer Link — Corrected timer link connection from TIM2 channel 0 to
TIM1 channel 0.
147
21.5 5.0-Vdc Electrical Characteristics and
21.6 3.3-Vdc Electrical Characteristics — Updated DC injection current
specification.
317
319
April,
2007
6.0
Figure 2-2. Control, Status, and Data Registers — Changed TBMCLKSEL to
TMBCLKSEL to be compatible with development tool nomenclature
37
Chapter 5 Configuration Register (CONFIG) — Changed COPCLK to
CGMXCLK and TBMCLKSEL to TMBCLKSEL to be compatible with
development tool nomenclature
91
92
93
10.6.2 Stop Mode — Changed COPCLK to CGMXCLK 125
Figure 14-3. ESCI Module Block Diagram — Changed BUS_CLK to BUS
CLOCK and removed reference to 4xBUSCLK
192
14.4.2 Transmitter — Changed ESCIBDSRC to SCIBDSRC 194
14.9.1 ESCI Arbiter Control Register and 14.9.3 Bit Time Measurement
Replaced one quarter with one half in the definition for ACLK = 1
217
218
Figure 17-1. Timebase Block Diagram, 17.5 TBM Interrupt Rate, and Table
17-1. Timebase Divider Selection — Changed TBMCLKSEL to TMBCLKSEL
to be compatible with development tool nomenclature
260
261
21.9 Clock Generation Module (CGM) Characteristics — Updated section to
include the following:
21.9.1 CGM Operating Conditions
21.9.2 CGM Component Information
21.9.3 CGM Acquisition/Lock Time Information
322
322
323
Revision History (Continued)
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