Datasheet

Break Module (BREAK)
Break Module Registers
MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3 Technical Data
Freescale Semiconductor Break Module (BREAK) 249
17.5.2 Stop Mode
A break interrupt causes exit from stop mode and sets the SBSW bit in
the break status register. See 8.8 SIM Registers.
17.6 Break Module Registers
These registers control and monitor operation of the break module:
• Break status and control register (BRKSCR)
• Break address register high (BRKH)
• Break address register low (BRKL)
• Break status register (BSR)
• Break flag control register (BFCR)
17.6.1 Break Status and Control Register
The break status and control register contains break module enable and
status bits.
BRKE — Break Enable Bit
This read/write bit enables breaks on break address register matches.
Clear BRKE by writing a logic 0 to bit 7. Reset clears the BRKE bit.
1 = Breaks enabled on 16-bit address match
0 = Breaks disabled
Address: $FE0E
Bit 7654321Bit 0
Read:
BRKE BRKA
000000
Write:
Reset:
00000000
= Unimplemented
Figure 17-3. Break Status and Control Register (BRKSCR)