Datasheet

MC68HC08JT8
MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3 Technical Data
Freescale Semiconductor MC68HC08JT8 281
B.5 Power Supply Pins
The MC68HC08JT8 is design for low voltage operation. Connect V
DD
and V
REG
for normal operation.
The V
REG
voltage regulator is disabled on the MC68HC08JT8.
Figure B-3. Power Supply Bypassing
B.6 Reserved Register Bit
Bit 4 of the configuration register ($001F) is a reserved bit on the
MC68HC08JT8. The bit will always read as zero.
On the MC68HC908JB8, bit 4 of the configuration register is the low-
voltage inhibit disable bit, LVID.
B.7 Reserved Registers
The two registers at $FE08 and $FE09 are reserved locations on the
MC68HC08JT8.
On the MC68HC908JB8, these two locations are the FLASH control
register and the FLASH block protect register respectively.
MCU
C
BULK
10 µF
C
BYPASS
0.1 µF
+
NOTE: Values shown are typical values.
V
DD
V
REG
V
SS
V
DD