Datasheet

System Integration Module (SIM)
Technical Data MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
114 System Integration Module (SIM) Freescale Semiconductor
SBSW can be read within the break state SWI routine. The user can
modify the return address on the stack by subtracting one from it.
The following code is an example of this. Writing 0 to the SBSW bit
clears it.
8.8.2 Reset Status Register
This register contains seven flags that show the source of the last reset.
All flag bits are cleared automatically following a read of the register. The
register is initialized on power-up as shown with the POR bit set and all
other bits cleared. However, during a POR or any other internal reset,
the RST pin is pulled low. After the pin is released, it will be sampled 32
XCLK cycles later. If the pin is not above a V
IH
at that time, then the PIN
bit in the RSR may be set in addition to whatever other bits are set.
This code works if the H register has been pushed onto the stack in the break service
routine software. This code should be executed at the end of the break service routine
software.
HIBYTE EQU 5
LOBYTE EQU 6
; If not SBSW, do RTI
BRCLR SBSW,BSR, RETURN ;
;
See if wait mode or stop mode was exited
by break.
TST LOBYTE,SP ; If RETURNLO is not zero,
BNE DOLO ; then just decrement low byte.
DEC HIBYTE,SP ; Else deal with high byte, too.
DOLO DEC LOBYTE,SP ; Point to WAIT/STOP opcode.
RETURN PULH
RTI
; Restore H register.